SOC_SW_RST_CONTROL_REG_CORE0
(SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
(SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));