SMC_IO_SHIFT
val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
if (((unsigned long)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
readb(addr + (ECOR << SMC_IO_SHIFT));
writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
SMC_outb(__val16 >> 8, a, __reg + (1 << SMC_IO_SHIFT)); \
#ifndef SMC_IO_SHIFT
#define SMC_IO_EXTENT (16 << SMC_IO_SHIFT)
__val16 |= SMC_inb(a, __reg + (1 << SMC_IO_SHIFT)) << 8; \
#define BANK_SELECT (14 << SMC_IO_SHIFT)
#define ATTRIB_SIZE ((64*1024) << SMC_IO_SHIFT)
reg<<SMC_IO_SHIFT; \
#define SMC_REG(lp, reg, bank) (reg<<SMC_IO_SHIFT)
SMC_outl((x)<<16, ioaddr, 12<<SMC_IO_SHIFT); \