drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

238

r = SOC15_WAIT_ON_RREG(JPEG, 0,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

269

r = SOC15_WAIT_ON_RREG(JPEG, 0, mmUVD_PGFSM_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

699

ret = SOC15_WAIT_ON_RREG(JPEG, 0, mmUVD_JRBC_STATUS, UVD_JRBC_STATUS__RB_JOB_DONE_MASK,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

547

ret = SOC15_WAIT_ON_RREG(JPEG, i, mmUVD_JRBC_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

296

r = SOC15_WAIT_ON_RREG(JPEG, 0,

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

331

r = SOC15_WAIT_ON_RREG(JPEG, 0, mmUVD_PGFSM_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

492

return SOC15_WAIT_ON_RREG(JPEG, 0, mmUVD_JRBC_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

333

r = SOC15_WAIT_ON_RREG(JPEG, 0,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

368

r = SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_PGFSM_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

652

return SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_JRBC_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

549

SOC15_WAIT_ON_RREG(JPEG, jpeg_inst, regUVD_PGFSM_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

379

SOC15_WAIT_ON_RREG(JPEG, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

404

SOC15_WAIT_ON_RREG(JPEG, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

435

SOC15_WAIT_ON_RREG(JPEG, inst_idx, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

677

return SOC15_WAIT_ON_RREG(JPEG, i, regUVD_JRBC_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

275

SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_IPX_DLDO_STATUS, 0,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

295

SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

578

return SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_JRBC_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

258

SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_IPX_DLDO_STATUS, 0,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

278

SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

561

return SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_JRBC0_UVD_JRBC_STATUS,

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

164

r = SOC15_WAIT_ON_RREG(VCN, 0, regVCN_MES_MSTATUS_LO, 0xAAAAAAAA, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

261

SOC15_WAIT_ON_RREG(VCN, 0, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

67

SOC15_WAIT_ON_RREG(VCN, 0, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1190

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_STATUS, UVD_STATUS__IDLE, 0x7);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1196

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1205

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1244

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1250

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1253

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1256

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_JRBC_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1259

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RBC_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1261

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1314

ret_code = SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1322

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1343

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1369

ret_code = SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1382

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1403

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1430

ret = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

764

SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, UVD_PGFSM_STATUS__UVDM_UVDU_PWR_ON, 0xFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

778

SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, 0, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

829

SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, data, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1188

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1193

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1196

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1199

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RBC_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1201

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1230

r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE, 0x7);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1238

r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1249

r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1307

ret_code = SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1317

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1354

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1391

ret = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

781

SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

795

SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, 0, 0xFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

849

SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, data, 0xFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1549

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1554

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1557

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1560

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_RBC_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1562

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1593

r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_STATUS, UVD_STATUS__IDLE, 0x7);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1601

r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1612

r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1668

ret_code = SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1679

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1713

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1719

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1967

ret = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_STATUS, UVD_STATUS__IDLE,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

792

SOC15_WAIT_ON_RREG(VCN, i, mmUVD_CGC_GATE, 0, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1604

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1609

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1612

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1615

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_RBC_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1617

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1648

r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_STATUS, UVD_STATUS__IDLE, 0x7);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1656

r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1666

r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1731

ret_code = SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1740

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1782

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

2219

ret = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_STATUS, UVD_STATUS__IDLE,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

694

SOC15_WAIT_ON_RREG(VCN, inst, mmUVD_PGFSM_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

712

SOC15_WAIT_ON_RREG(VCN, inst, mmUVD_PGFSM_STATUS, 0, 0x3F3FFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

767

SOC15_WAIT_ON_RREG(VCN, inst, mmUVD_PGFSM_STATUS, data, 0x3F3FFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

818

SOC15_WAIT_ON_RREG(VCN, inst, mmUVD_CGC_GATE, 0, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1578

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1583

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1585

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1625

r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_STATUS, UVD_STATUS__IDLE, 0x7);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1633

r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1643

r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1714

ret_code = SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1723

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1727

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

2071

ret = SOC15_WAIT_ON_RREG(VCN, i, regUVD_STATUS, UVD_STATUS__IDLE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

641

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_PGFSM_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

663

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_PGFSM_STATUS, value, 0x3F3FFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

727

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_PGFSM_STATUS, data, 0x3F3FFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

779

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_CGC_GATE, 0, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1375

SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1380

SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1382

SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1423

r = SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1432

r = SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_LMI_STATUS, tmp,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1443

r = SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_LMI_STATUS, tmp,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1510

ret_code = SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1519

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1841

ret = SOC15_WAIT_ON_RREG(VCN, GET_INST(VCN, i), regUVD_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

677

SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_CGC_GATE, 0, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1240

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1245

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1247

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1288

r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_STATUS, UVD_STATUS__IDLE, 0x7);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1296

r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1306

r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1377

ret_code = SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1386

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1390

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1573

ret = SOC15_WAIT_ON_RREG(VCN, i, regUVD_STATUS, UVD_STATUS__IDLE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

584

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS, 0,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

588

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

593

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

598

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

604

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

608

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

612

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

616

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

650

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

655

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

660

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

665

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

717

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_CGC_GATE, 0, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1019

r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_STATUS, UVD_STATUS__IDLE, 0x7);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1027

r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1037

r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1105

ret_code = SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1114

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1294

ret = SOC15_WAIT_ON_RREG(VCN, i, regUVD_STATUS, UVD_STATUS__IDLE,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

545

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS, 0,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

550

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

556

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

562

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

568

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS, 0,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

573

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS, 0,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

578

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS, 0,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

583

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS, 0,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

619

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

625

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

631

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

637

SOC15_WAIT_ON_RREG(VCN, inst, regUVD_IPX_DLDO_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

972

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

977

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1146

SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1151

SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_RB_RPTR, tmp, 0xFFFFFFFF);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1189

r = SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_STATUS, UVD_STATUS__IDLE, 0x7);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1197

r = SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1207

r = SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_LMI_STATUS, tmp, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1499

ret = SOC15_WAIT_ON_RREG(VCN, GET_INST(VCN, i), regUVD_STATUS, UVD_STATUS__IDLE,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

643

SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

292

ret = SOC15_WAIT_ON_RREG(VPE, i, regVPEC_QUEUE_RESET_REQ_6_1_1, 0,

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

296

ret = SOC15_WAIT_ON_RREG(VPE, i, regVPEC_QUEUE_RESET_REQ, 0,