arch/sh/kernel/cpu/sh4a/setup-sh7722.c

36

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

46

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

56

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

66

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

76

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

86

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

103

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

113

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

123

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

133

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

143

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

153

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

43

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

53

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

63

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

73

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

83

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

93

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),