Symbol: SMU_INTR_REG
drivers/accel/amdxdna/aie2_smu.c
43
writel(0, SMU_REG(ndev, SMU_INTR_REG));
drivers/accel/amdxdna/aie2_smu.c
44
writel(1, SMU_REG(ndev, SMU_INTR_REG));
drivers/accel/amdxdna/npu1_regs.c
101
DEFINE_BAR_OFFSET(SMU_INTR_REG, NPU1_SMU, MPNPU_PUB_PWRMGMT_INTR),
drivers/accel/amdxdna/npu4_regs.c
127
DEFINE_BAR_OFFSET(SMU_INTR_REG, NPU4_SMU, MMNPU_APERTURE4_BASE),
drivers/accel/amdxdna/npu5_regs.c
92
DEFINE_BAR_OFFSET(SMU_INTR_REG, NPU5_SMU, MMNPU_APERTURE4_BASE),
drivers/accel/amdxdna/npu6_regs.c
92
DEFINE_BAR_OFFSET(SMU_INTR_REG, NPU6_SMU, MMNPU_APERTURE4_BASE),