drivers/gpu/drm/amd/pm/powerplay/inc/smu7_discrete.h

423

typedef struct SMU7_Discrete_MCRegisterSet SMU7_Discrete_MCRegisterSet;

drivers/gpu/drm/amd/pm/powerplay/inc/smu7_discrete.h

430

SMU7_Discrete_MCRegisterSet data[SMU7_DISCRETE_MC_REGISTER_ARRAY_SET_COUNT];

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1749

SMU7_Discrete_MCRegisterSet *data,

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1765

SMU7_Discrete_MCRegisterSet *mc_reg_table_data

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1832

sizeof(SMU7_Discrete_MCRegisterSet) * data->dpm_table.mclk_table.count,

drivers/gpu/drm/radeon/ci_dpm.c

4655

SMU7_Discrete_MCRegisterSet *data,

drivers/gpu/drm/radeon/ci_dpm.c

4670

SMU7_Discrete_MCRegisterSet *mc_reg_table_data)

drivers/gpu/drm/radeon/ci_dpm.c

4734

sizeof(SMU7_Discrete_MCRegisterSet) *

drivers/gpu/drm/radeon/smu7_discrete.h

407

typedef struct SMU7_Discrete_MCRegisterSet SMU7_Discrete_MCRegisterSet;

drivers/gpu/drm/radeon/smu7_discrete.h

413

SMU7_Discrete_MCRegisterSet data[SMU7_DISCRETE_MC_REGISTER_ARRAY_SET_COUNT];