drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5361

SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5391

smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable, DisplayWatermark),

drivers/gpu/drm/amd/pm/powerplay/inc/smu74_discrete.h

373

typedef struct SMU74_Discrete_DpmTable SMU74_Discrete_DpmTable;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1029

SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1047

offsetof(SMU74_Discrete_DpmTable, GraphicsLevel);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1216

offsetof(SMU74_Discrete_DpmTable, MemoryLevel);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1278

SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1366

SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

140

vr_config_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, VRConfig);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1416

SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

147

graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, GraphicsLevel);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1521

struct SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

155

graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, MemoryLevel);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1578

struct SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

164

graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, BootMVdd);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1712

struct SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1775

SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1921

struct SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2120

offsetof(SMU74_Discrete_DpmTable, SystemFlags),

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2122

sizeof(SMU74_Discrete_DpmTable) - 3 * sizeof(SMU74_PIDController),

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2292

mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable,

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2329

offsetof(SMU74_Discrete_DpmTable, VceBootLevel);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2401

offsetof(SMU74_Discrete_DpmTable,

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2452

return offsetof(SMU74_Discrete_DpmTable, UvdBootLevel);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2454

return offsetof(SMU74_Discrete_DpmTable, VceBootLevel);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2456

return offsetof(SMU74_Discrete_DpmTable, LowSclkInterruptThreshold);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2595

offsetof(SMU74_Discrete_DpmTable, GraphicsLevel);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2598

offsetof(SMU74_Discrete_DpmTable, MemoryLevel);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

432

SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

478

SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

665

SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

692

struct SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

717

struct SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

742

struct SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

768

struct SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

810

struct SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

816

struct SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

848

SMU74_Discrete_DpmTable *table)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

894

const SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.h

57

SMU74_Discrete_DpmTable smc_state_table;