drivers/gpu/drm/amd/pm/powerplay/inc/smu73_discrete.h

122

typedef struct SMU73_Discrete_MemoryLevel SMU73_Discrete_MemoryLevel;

drivers/gpu/drm/amd/pm/powerplay/inc/smu73_discrete.h

240

SMU73_Discrete_MemoryLevel MemoryACPILevel;

drivers/gpu/drm/amd/pm/powerplay/inc/smu73_discrete.h

241

SMU73_Discrete_MemoryLevel MemoryLevel[SMU73_MAX_LEVELS_MEMORY];

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1143

uint32_t clock, struct SMU73_Discrete_MemoryLevel *mclk)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1162

uint32_t clock, struct SMU73_Discrete_MemoryLevel *mem_level)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1228

uint32_t array_size = sizeof(SMU73_Discrete_MemoryLevel) *

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1230

struct SMU73_Discrete_MemoryLevel *levels =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2561

struct SMU73_Discrete_MemoryLevel *mclk_levels =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2614

clk_activity_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2615

+ offsetof(SMU73_Discrete_MemoryLevel, ActivityLevel);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2626

up_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2627

+ offsetof(SMU73_Discrete_MemoryLevel, UpHyst);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2628

down_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2629

+ offsetof(SMU73_Discrete_MemoryLevel, DownHyst);