Symbol: BD
arch/powerpc/xmon/ppc-opc.c
170
#define BDA BD + 1
arch/powerpc/xmon/ppc-opc.c
3865
{"bdnz", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BD}},
arch/powerpc/xmon/ppc-opc.c
3866
{"bdn", BBO(16,BODNZ,0,0), BBOATBI_MASK, PWRCOM, PPCVLE, {BD}},
arch/powerpc/xmon/ppc-opc.c
3869
{"bdnzl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BD}},
arch/powerpc/xmon/ppc-opc.c
3870
{"bdnl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PWRCOM, PPCVLE, {BD}},
arch/powerpc/xmon/ppc-opc.c
3881
{"bdz", BBO(16,BODZ,0,0), BBOATBI_MASK, COM, PPCVLE, {BD}},
arch/powerpc/xmon/ppc-opc.c
3884
{"bdzl", BBO(16,BODZ,0,1), BBOATBI_MASK, COM, PPCVLE, {BD}},
arch/powerpc/xmon/ppc-opc.c
3894
{"bge", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3897
{"bnl", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3900
{"bgel", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3903
{"bnll", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3918
{"ble", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3921
{"bng", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3924
{"blel", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3927
{"bngl", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3942
{"bne", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3945
{"bnel", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3954
{"bns", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3957
{"bnu", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3960
{"bnsl", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3963
{"bnul", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3979
{"blt", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3982
{"bltl", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3991
{"bgt", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3994
{"bgtl", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4003
{"beq", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4006
{"beql", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4015
{"bso", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4018
{"bun", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4021
{"bsol", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4024
{"bunl", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4040
{"bdnzf", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4043
{"bdnzfl", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4052
{"bdzf", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4055
{"bdzfl", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4065
{"bf", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4066
{"bbf", BBO(16,BOF,0,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4069
{"bfl", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4070
{"bbfl", BBO(16,BOF,0,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4082
{"bdnzt", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4085
{"bdnztl", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4094
{"bdzt", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4097
{"bdztl", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4107
{"bt", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4108
{"bbt", BBO(16,BOT,0,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4111
{"btl", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4112
{"bbtl", BBO(16,BOT,0,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4124
{"bc", B(16,0,0), B_MASK, COM, PPCVLE, {BO, BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4127
{"bcl", B(16,0,1), B_MASK, COM, PPCVLE, {BO, BI, BD}},
arch/x86/events/intel/p4.c
81
P4_ESCR_EMASK_BIT(P4_EVENT_TC_DELIVER_MODE, BD) |