Symbol: SMP_CORE1_OFFSET
arch/mips/loongson64/smp.c
192
(SMP_CORE_GROUP0_BASE + SMP_CORE1_OFFSET + SET0);
arch/mips/loongson64/smp.c
200
(SMP_CORE_GROUP1_BASE + SMP_CORE1_OFFSET + SET0);
arch/mips/loongson64/smp.c
208
(SMP_CORE_GROUP2_BASE + SMP_CORE1_OFFSET + SET0);
arch/mips/loongson64/smp.c
216
(SMP_CORE_GROUP3_BASE + SMP_CORE1_OFFSET + SET0);
arch/mips/loongson64/smp.c
228
(SMP_CORE_GROUP0_BASE + SMP_CORE1_OFFSET + CLEAR0);
arch/mips/loongson64/smp.c
236
(SMP_CORE_GROUP1_BASE + SMP_CORE1_OFFSET + CLEAR0);
arch/mips/loongson64/smp.c
244
(SMP_CORE_GROUP2_BASE + SMP_CORE1_OFFSET + CLEAR0);
arch/mips/loongson64/smp.c
252
(SMP_CORE_GROUP3_BASE + SMP_CORE1_OFFSET + CLEAR0);
arch/mips/loongson64/smp.c
264
(SMP_CORE_GROUP0_BASE + SMP_CORE1_OFFSET + STATUS0);
arch/mips/loongson64/smp.c
272
(SMP_CORE_GROUP1_BASE + SMP_CORE1_OFFSET + STATUS0);
arch/mips/loongson64/smp.c
280
(SMP_CORE_GROUP2_BASE + SMP_CORE1_OFFSET + STATUS0);
arch/mips/loongson64/smp.c
288
(SMP_CORE_GROUP3_BASE + SMP_CORE1_OFFSET + STATUS0);
arch/mips/loongson64/smp.c
300
(SMP_CORE_GROUP0_BASE + SMP_CORE1_OFFSET + EN0);
arch/mips/loongson64/smp.c
308
(SMP_CORE_GROUP1_BASE + SMP_CORE1_OFFSET + EN0);
arch/mips/loongson64/smp.c
316
(SMP_CORE_GROUP2_BASE + SMP_CORE1_OFFSET + EN0);
arch/mips/loongson64/smp.c
324
(SMP_CORE_GROUP3_BASE + SMP_CORE1_OFFSET + EN0);
arch/mips/loongson64/smp.c
336
(SMP_CORE_GROUP0_BASE + SMP_CORE1_OFFSET + BUF);
arch/mips/loongson64/smp.c
344
(SMP_CORE_GROUP1_BASE + SMP_CORE1_OFFSET + BUF);
arch/mips/loongson64/smp.c
352
(SMP_CORE_GROUP2_BASE + SMP_CORE1_OFFSET + BUF);
arch/mips/loongson64/smp.c
360
(SMP_CORE_GROUP3_BASE + SMP_CORE1_OFFSET + BUF);