Symbol: SMP_CORE0_OFFSET
arch/mips/loongson64/smp.c
190
(SMP_CORE_GROUP0_BASE + SMP_CORE0_OFFSET + SET0);
arch/mips/loongson64/smp.c
198
(SMP_CORE_GROUP1_BASE + SMP_CORE0_OFFSET + SET0);
arch/mips/loongson64/smp.c
206
(SMP_CORE_GROUP2_BASE + SMP_CORE0_OFFSET + SET0);
arch/mips/loongson64/smp.c
214
(SMP_CORE_GROUP3_BASE + SMP_CORE0_OFFSET + SET0);
arch/mips/loongson64/smp.c
226
(SMP_CORE_GROUP0_BASE + SMP_CORE0_OFFSET + CLEAR0);
arch/mips/loongson64/smp.c
234
(SMP_CORE_GROUP1_BASE + SMP_CORE0_OFFSET + CLEAR0);
arch/mips/loongson64/smp.c
242
(SMP_CORE_GROUP2_BASE + SMP_CORE0_OFFSET + CLEAR0);
arch/mips/loongson64/smp.c
250
(SMP_CORE_GROUP3_BASE + SMP_CORE0_OFFSET + CLEAR0);
arch/mips/loongson64/smp.c
262
(SMP_CORE_GROUP0_BASE + SMP_CORE0_OFFSET + STATUS0);
arch/mips/loongson64/smp.c
270
(SMP_CORE_GROUP1_BASE + SMP_CORE0_OFFSET + STATUS0);
arch/mips/loongson64/smp.c
278
(SMP_CORE_GROUP2_BASE + SMP_CORE0_OFFSET + STATUS0);
arch/mips/loongson64/smp.c
286
(SMP_CORE_GROUP3_BASE + SMP_CORE0_OFFSET + STATUS0);
arch/mips/loongson64/smp.c
298
(SMP_CORE_GROUP0_BASE + SMP_CORE0_OFFSET + EN0);
arch/mips/loongson64/smp.c
306
(SMP_CORE_GROUP1_BASE + SMP_CORE0_OFFSET + EN0);
arch/mips/loongson64/smp.c
314
(SMP_CORE_GROUP2_BASE + SMP_CORE0_OFFSET + EN0);
arch/mips/loongson64/smp.c
322
(SMP_CORE_GROUP3_BASE + SMP_CORE0_OFFSET + EN0);
arch/mips/loongson64/smp.c
334
(SMP_CORE_GROUP0_BASE + SMP_CORE0_OFFSET + BUF);
arch/mips/loongson64/smp.c
342
(SMP_CORE_GROUP1_BASE + SMP_CORE0_OFFSET + BUF);
arch/mips/loongson64/smp.c
350
(SMP_CORE_GROUP2_BASE + SMP_CORE0_OFFSET + BUF);
arch/mips/loongson64/smp.c
358
(SMP_CORE_GROUP3_BASE + SMP_CORE0_OFFSET + BUF);