SJA1110_SPI_ADDR
.addr = SJA1110_SPI_ADDR(0x124),
.addr = SJA1110_SPI_ADDR(0x310),
.addr = SJA1110_SPI_ADDR(0x8c),
.addr = SJA1110_SPI_ADDR(0xb4),
.addr = SJA1110_SPI_ADDR(0xa8),
.addr = SJA1110_SPI_ADDR(0x134),
.addr = SJA1110_SPI_ADDR(0x158),
.addr = SJA1110_SPI_ADDR(0x2000C),
.addr = SJA1110_SPI_ADDR(0xe8),
.addr = SJA1110_SPI_ADDR(0xdc),
.addr = SJA1110_SPI_ADDR(0xc4),
.addr = SJA1110_SPI_ADDR(0x3c),
.addr = SJA1110_SPI_ADDR(0x2fc),
.addr = SJA1110_SPI_ADDR(0x20000),
#define SJA1110_PCS_BANK_REG SJA1110_SPI_ADDR(0x3fc)
.device_id = SJA1110_SPI_ADDR(0x0),
.status = SJA1110_SPI_ADDR(0x4),
.port_control = SJA1110_SPI_ADDR(0x50), /* actually INHIB_TX */
.ptpschtm = SJA1110_SPI_ADDR(0x54),
.ptppinst = SJA1110_SPI_ADDR(0x5c),
.ptppindur = SJA1110_SPI_ADDR(0x64),
.ptp_control = SJA1110_SPI_ADDR(0x68),
.ptpclkval = SJA1110_SPI_ADDR(0x6c),
.ptpclkrate = SJA1110_SPI_ADDR(0x74),
.ptpclkcorp = SJA1110_SPI_ADDR(0x80),
.ptpsyncts = SJA1110_SPI_ADDR(0x84),
#define SJA1110_ACU_ADDR(x) (SJA1110_ACU + SJA1110_SPI_ADDR(x))
#define SJA1110_CGU_ADDR(x) (SJA1110_CGU + SJA1110_SPI_ADDR(x))
#define SJA1110_RGU_ADDR(x) (SJA1110_RGU + SJA1110_SPI_ADDR(x))