SMI_ADDR_TSTCNTL
ret = phy_write(phydev, SMI_ADDR_TSTCNTL, TSTMODE_ENABLE);
ret = phy_write(phydev, SMI_ADDR_TSTCNTL, TSTMODE_DISABLE);
return phy_write(phydev, SMI_ADDR_TSTCNTL, TSTMODE_ENABLE);
return phy_write(phydev, SMI_ADDR_TSTCNTL, TSTMODE_DISABLE);
ret = phy_write(phydev, SMI_ADDR_TSTCNTL, TSTCNTL_WR | WR_ADDR_A7CFG);