drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4804

SMC_SIslands_MCArbDramTimingRegisterSet *arb_regs)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4836

SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4846

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * (first_arb_set + i),

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4848

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5203

SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5217

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * SISLANDS_ULV_STATE_ARB_INDEX,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5219

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),

drivers/gpu/drm/amd/pm/legacy-dpm/sislands_smc.h

327

typedef struct SMC_SIslands_MCArbDramTimingRegisterSet SMC_SIslands_MCArbDramTimingRegisterSet;

drivers/gpu/drm/amd/pm/legacy-dpm/sislands_smc.h

332

SMC_SIslands_MCArbDramTimingRegisterSet data[16];

drivers/gpu/drm/radeon/si_dpm.c

4237

SMC_SIslands_MCArbDramTimingRegisterSet *arb_regs)

drivers/gpu/drm/radeon/si_dpm.c

4267

SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };

drivers/gpu/drm/radeon/si_dpm.c

4277

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * (first_arb_set + i),

drivers/gpu/drm/radeon/si_dpm.c

4279

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),

drivers/gpu/drm/radeon/si_dpm.c

4607

SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };

drivers/gpu/drm/radeon/si_dpm.c

4621

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * SISLANDS_ULV_STATE_ARB_INDEX,

drivers/gpu/drm/radeon/si_dpm.c

4623

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),

drivers/gpu/drm/radeon/sislands_smc.h

331

typedef struct SMC_SIslands_MCArbDramTimingRegisterSet SMC_SIslands_MCArbDramTimingRegisterSet;

drivers/gpu/drm/radeon/sislands_smc.h

336

SMC_SIslands_MCArbDramTimingRegisterSet data[16];