Symbol: ACP_I2S_REG_ADDR
sound/soc/amd/acp/chip_offset_byte.h
46
#define ACP_I2S_RX_RINGBUFADDR(adata) ACP_I2S_REG_ADDR(adata, 0x2000)
sound/soc/amd/acp/chip_offset_byte.h
47
#define ACP_I2S_RX_RINGBUFSIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2004)
sound/soc/amd/acp/chip_offset_byte.h
48
#define ACP_I2S_RX_LINKPOSITIONCNTR(adata) ACP_I2S_REG_ADDR(adata, 0x2008)
sound/soc/amd/acp/chip_offset_byte.h
49
#define ACP_I2S_RX_FIFOADDR(adata) ACP_I2S_REG_ADDR(adata, 0x200C)
sound/soc/amd/acp/chip_offset_byte.h
50
#define ACP_I2S_RX_FIFOSIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2010)
sound/soc/amd/acp/chip_offset_byte.h
51
#define ACP_I2S_RX_DMA_SIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2014)
sound/soc/amd/acp/chip_offset_byte.h
52
#define ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH(adata) ACP_I2S_REG_ADDR(adata, 0x2018)
sound/soc/amd/acp/chip_offset_byte.h
53
#define ACP_I2S_RX_LINEARPOSITIONCNTR_LOW(adata) ACP_I2S_REG_ADDR(adata, 0x201C)
sound/soc/amd/acp/chip_offset_byte.h
54
#define ACP_I2S_RX_INTR_WATERMARK_SIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2020)
sound/soc/amd/acp/chip_offset_byte.h
55
#define ACP_I2S_TX_RINGBUFADDR(adata) ACP_I2S_REG_ADDR(adata, 0x2024)
sound/soc/amd/acp/chip_offset_byte.h
56
#define ACP_I2S_TX_RINGBUFSIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2028)
sound/soc/amd/acp/chip_offset_byte.h
57
#define ACP_I2S_TX_LINKPOSITIONCNTR(adata) ACP_I2S_REG_ADDR(adata, 0x202C)
sound/soc/amd/acp/chip_offset_byte.h
58
#define ACP_I2S_TX_FIFOADDR(adata) ACP_I2S_REG_ADDR(adata, 0x2030)
sound/soc/amd/acp/chip_offset_byte.h
59
#define ACP_I2S_TX_FIFOSIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2034)
sound/soc/amd/acp/chip_offset_byte.h
60
#define ACP_I2S_TX_DMA_SIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2038)
sound/soc/amd/acp/chip_offset_byte.h
61
#define ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH(adata) ACP_I2S_REG_ADDR(adata, 0x203C)
sound/soc/amd/acp/chip_offset_byte.h
62
#define ACP_I2S_TX_LINEARPOSITIONCNTR_LOW(adata) ACP_I2S_REG_ADDR(adata, 0x2040)
sound/soc/amd/acp/chip_offset_byte.h
63
#define ACP_I2S_TX_INTR_WATERMARK_SIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2044)
sound/soc/amd/acp/chip_offset_byte.h
64
#define ACP_BT_RX_RINGBUFADDR(adata) ACP_I2S_REG_ADDR(adata, 0x2048)
sound/soc/amd/acp/chip_offset_byte.h
65
#define ACP_BT_RX_RINGBUFSIZE(adata) ACP_I2S_REG_ADDR(adata, 0x204C)
sound/soc/amd/acp/chip_offset_byte.h
66
#define ACP_BT_RX_LINKPOSITIONCNTR(adata) ACP_I2S_REG_ADDR(adata, 0x2050)
sound/soc/amd/acp/chip_offset_byte.h
67
#define ACP_BT_RX_FIFOADDR(adata) ACP_I2S_REG_ADDR(adata, 0x2054)
sound/soc/amd/acp/chip_offset_byte.h
68
#define ACP_BT_RX_FIFOSIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2058)
sound/soc/amd/acp/chip_offset_byte.h
69
#define ACP_BT_RX_DMA_SIZE(adata) ACP_I2S_REG_ADDR(adata, 0x205C)
sound/soc/amd/acp/chip_offset_byte.h
70
#define ACP_BT_RX_LINEARPOSITIONCNTR_HIGH(adata) ACP_I2S_REG_ADDR(adata, 0x2060)
sound/soc/amd/acp/chip_offset_byte.h
71
#define ACP_BT_RX_LINEARPOSITIONCNTR_LOW(adata) ACP_I2S_REG_ADDR(adata, 0x2064)
sound/soc/amd/acp/chip_offset_byte.h
72
#define ACP_BT_RX_INTR_WATERMARK_SIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2068)
sound/soc/amd/acp/chip_offset_byte.h
73
#define ACP_BT_TX_RINGBUFADDR(adata) ACP_I2S_REG_ADDR(adata, 0x206C)
sound/soc/amd/acp/chip_offset_byte.h
74
#define ACP_BT_TX_RINGBUFSIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2070)
sound/soc/amd/acp/chip_offset_byte.h
75
#define ACP_BT_TX_LINKPOSITIONCNTR(adata) ACP_I2S_REG_ADDR(adata, 0x2074)
sound/soc/amd/acp/chip_offset_byte.h
76
#define ACP_BT_TX_FIFOADDR(adata) ACP_I2S_REG_ADDR(adata, 0x2078)
sound/soc/amd/acp/chip_offset_byte.h
77
#define ACP_BT_TX_FIFOSIZE(adata) ACP_I2S_REG_ADDR(adata, 0x207C)
sound/soc/amd/acp/chip_offset_byte.h
78
#define ACP_BT_TX_DMA_SIZE(adata) ACP_I2S_REG_ADDR(adata, 0x2080)
sound/soc/amd/acp/chip_offset_byte.h
79
#define ACP_BT_TX_LINEARPOSITIONCNTR_HIGH(adata) ACP_I2S_REG_ADDR(adata, 0x2084)
sound/soc/amd/acp/chip_offset_byte.h
80
#define ACP_BT_TX_LINEARPOSITIONCNTR_LOW(adata) ACP_I2S_REG_ADDR(adata, 0x2088)
sound/soc/amd/acp/chip_offset_byte.h
81
#define ACP_BT_TX_INTR_WATERMARK_SIZE(adata) ACP_I2S_REG_ADDR(adata, 0x208C)