Symbol: SHIFT_AND_MASK_BITS
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
101
SHIFT_AND_MASK_BITS(p, 11, 10)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
103
SHIFT_AND_MASK_BITS(s, 9, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
124
SHIFT_AND_MASK_BITS(DIV_ROUND_UP(w, 16), 15, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
126
SHIFT_AND_MASK_BITS(DIV_ROUND_UP(h, 16), 7, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
130
#define VE_DEC_MPEG_PICBOUNDSIZE_WIDTH(w) SHIFT_AND_MASK_BITS(w, 27, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
131
#define VE_DEC_MPEG_PICBOUNDSIZE_HEIGHT(h) SHIFT_AND_MASK_BITS(h, 11, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
135
#define VE_DEC_MPEG_MBADDR_X(w) SHIFT_AND_MASK_BITS(w, 15, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
136
#define VE_DEC_MPEG_MBADDR_Y(h) SHIFT_AND_MASK_BITS(h, 7, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
251
(SHIFT_AND_MASK_BITS(i, 13, 8) | SHIFT_AND_MASK_BITS(v, 7, 0))
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
261
SHIFT_AND_MASK_BITS(v, 8, 6)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
263
SHIFT_AND_MASK_BITS(v, 5, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
277
SHIFT_AND_MASK_BITS(v, 22, 20)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
279
SHIFT_AND_MASK_BITS(v, 19, 17)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
281
SHIFT_AND_MASK_BITS(v, 16, 15)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
283
SHIFT_AND_MASK_BITS(v, 14, 13)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
285
SHIFT_AND_MASK_BITS(v, 12, 11)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
287
SHIFT_AND_MASK_BITS(v, 10, 9)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
289
SHIFT_AND_MASK_BITS(v, 8, 6)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
291
SHIFT_AND_MASK_BITS(v, 5, 3)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
293
SHIFT_AND_MASK_BITS(v, 1, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
306
SHIFT_AND_MASK_BITS(v, 11, 10)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
308
SHIFT_AND_MASK_BITS(v, 9, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
310
SHIFT_AND_MASK_BITS(v, 7, 4)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
312
SHIFT_AND_MASK_BITS(v, 3, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
322
SHIFT_AND_MASK_BITS(v, 29, 24)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
324
SHIFT_AND_MASK_BITS(v, 21, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
326
SHIFT_AND_MASK_BITS(v, 14, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
328
SHIFT_AND_MASK_BITS(v, 5, 4)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
341
SHIFT_AND_MASK_BITS(v, 10, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
362
SHIFT_AND_MASK_BITS(v, 29, 28)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
364
SHIFT_AND_MASK_BITS(v, 26, 24)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
366
SHIFT_AND_MASK_BITS(v, 23, 20)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
368
SHIFT_AND_MASK_BITS(v, 19, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
370
SHIFT_AND_MASK_BITS(v, 15, 12)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
372
SHIFT_AND_MASK_BITS(v, 5, 4)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
374
SHIFT_AND_MASK_BITS(v, 3, 2)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
383
SHIFT_AND_MASK_BITS(v, 31, 28)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
385
SHIFT_AND_MASK_BITS(v, 27, 24)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
387
SHIFT_AND_MASK_BITS(v, 20, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
389
SHIFT_AND_MASK_BITS(v, 12, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
391
SHIFT_AND_MASK_BITS(v, 6, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
396
SHIFT_AND_MASK_BITS(v, 21, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
398
SHIFT_AND_MASK_BITS(v, 6, 4)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
400
SHIFT_AND_MASK_BITS(v, 2, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
404
#define VE_DEC_H265_DEC_CTB_ADDR_Y(y) SHIFT_AND_MASK_BITS(y, 25, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
405
#define VE_DEC_H265_DEC_CTB_ADDR_X(x) SHIFT_AND_MASK_BITS(x, 9, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
509
SHIFT_AND_MASK_BITS(v, 24, 23)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
512
SHIFT_AND_MASK_BITS(v, 21, 11)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
514
SHIFT_AND_MASK_BITS(v, 10, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
518
SHIFT_AND_MASK_BITS(a, 31, 24)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
520
SHIFT_AND_MASK_BITS(a, 23, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
522
SHIFT_AND_MASK_BITS(a, 7, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
579
#define VE_H264_TRIGGER_TYPE_PROBABILITY(x) SHIFT_AND_MASK_BITS(x, 31, 24)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
580
#define VE_H264_TRIGGER_TYPE_BIN_LENS(x) SHIFT_AND_MASK_BITS((x) - 1, 18, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
621
#define VE_VP8_PPS_LAST_SHARPNESS_LEVEL(v) SHIFT_AND_MASK_BITS(v, 30, 28)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
628
#define VE_VP8_PPS_TOKEN_PARTITION(v) SHIFT_AND_MASK_BITS(v, 21, 20)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
63
#define VE_PRIMARY_FB_LINE_STRIDE_CHROMA(s) SHIFT_AND_MASK_BITS(s, 31, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
631
#define VE_VP8_PPS_LOOP_FILTER_LEVEL(v) SHIFT_AND_MASK_BITS(v, 17, 12)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
633
#define VE_VP8_PPS_SHARPNESS_LEVEL(v) SHIFT_AND_MASK_BITS(v, 10, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
64
#define VE_PRIMARY_FB_LINE_STRIDE_LUMA(s) SHIFT_AND_MASK_BITS(s, 15, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
644
#define VE_VP8_QP_INDEX_DELTA_UVAC(v) SHIFT_AND_MASK_BITS(v, 31, 27)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
645
#define VE_VP8_QP_INDEX_DELTA_UVDC(v) SHIFT_AND_MASK_BITS(v, 26, 22)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
646
#define VE_VP8_QP_INDEX_DELTA_Y2AC(v) SHIFT_AND_MASK_BITS(v, 21, 17)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
647
#define VE_VP8_QP_INDEX_DELTA_Y2DC(v) SHIFT_AND_MASK_BITS(v, 16, 12)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
648
#define VE_VP8_QP_INDEX_DELTA_Y1DC(v) SHIFT_AND_MASK_BITS(v, 11, 7)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
649
#define VE_VP8_QP_INDEX_DELTA_BASE_QINDEX(v) SHIFT_AND_MASK_BITS(v, 6, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
657
SHIFT_AND_MASK_BITS(DIV_ROUND_UP(w, 16), 15, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
659
SHIFT_AND_MASK_BITS(DIV_ROUND_UP(h, 16), 7, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
662
#define VE_VP8_PICSIZE_WIDTH(w) SHIFT_AND_MASK_BITS(w, 27, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
663
#define VE_VP8_PICSIZE_HEIGHT(h) SHIFT_AND_MASK_BITS(h, 11, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
677
#define VE_VP8_SEGMENT3(v) SHIFT_AND_MASK_BITS(v, 31, 24)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
678
#define VE_VP8_SEGMENT2(v) SHIFT_AND_MASK_BITS(v, 23, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
679
#define VE_VP8_SEGMENT1(v) SHIFT_AND_MASK_BITS(v, 15, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
680
#define VE_VP8_SEGMENT0(v) SHIFT_AND_MASK_BITS(v, 7, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
685
#define VE_VP8_LF_DELTA3(v) SHIFT_AND_MASK_BITS(v, 30, 24)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
686
#define VE_VP8_LF_DELTA2(v) SHIFT_AND_MASK_BITS(v, 22, 16)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
687
#define VE_VP8_LF_DELTA1(v) SHIFT_AND_MASK_BITS(v, 14, 8)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
688
#define VE_VP8_LF_DELTA0(v) SHIFT_AND_MASK_BITS(v, 6, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
72
#define VE_CHROMA_BUF_LEN_SDRT(l) SHIFT_AND_MASK_BITS(l, 27, 0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
95
#define VE_DEC_MPEG_MP12HDR_SLICE_TYPE(t) SHIFT_AND_MASK_BITS(t, 30, 28)