arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

696

#define BCM_6328_UART1_IRQ (BCM_6328_HIGH_IRQ_BASE + 7)

arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

703

#define BCM_6328_OHCI0_IRQ (BCM_6328_HIGH_IRQ_BASE + 9)

arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

704

#define BCM_6328_EHCI0_IRQ (BCM_6328_HIGH_IRQ_BASE + 10)

arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

719

#define BCM_6328_ENETSW_RXDMA0_IRQ (BCM_6328_HIGH_IRQ_BASE + 0)

arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

720

#define BCM_6328_ENETSW_RXDMA1_IRQ (BCM_6328_HIGH_IRQ_BASE + 1)

arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

721

#define BCM_6328_ENETSW_RXDMA2_IRQ (BCM_6328_HIGH_IRQ_BASE + 2)

arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

722

#define BCM_6328_ENETSW_RXDMA3_IRQ (BCM_6328_HIGH_IRQ_BASE + 3)

arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

727

#define BCM_6328_XTM_IRQ (BCM_6328_HIGH_IRQ_BASE + 31)

arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

728

#define BCM_6328_XTM_DMA0_IRQ (BCM_6328_HIGH_IRQ_BASE + 11)