arch/sh/kernel/cpu/sh3/setup-sh7720.c

241

INTC_VECT(SIM, 0x4e0), INTC_VECT(SIM, 0x500),

arch/sh/kernel/cpu/sh3/setup-sh7720.c

242

INTC_VECT(SIM, 0x520), INTC_VECT(SIM, 0x540),

arch/sh/kernel/cpu/sh3/setup-sh7720.c

268

{ 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },

arch/sh/kernel/cpu/sh4/setup-sh7760.c

112

SCIF1, SCIF2, SIM, HSPI } },

arch/sh/kernel/cpu/sh4/setup-sh7760.c

83

INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),

arch/sh/kernel/cpu/sh4a/setup-sh7343.c

376

INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI),

arch/sh/kernel/cpu/sh4a/setup-sh7343.c

410

{ 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

581

INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

624

{ 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

1074

{ INT2PRI10, 0, 32, 8, { SPI0, SIM, PECI2, PECI1 } },

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

885

INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

886

INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

977

ADC1, 0, DMAC6_7, ADC0, SPI0, SIM, PECI2, PECI1,

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

284

INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

285

INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

310

PCC, 0, 0, ADC, TPU, SIM, SIOF2, SIOF1,

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

328

{ 0xffd400a8, 0, 32, 8, /* INT2PRI10 */ { TPU, SIM, SIOF2, SIOF1 } },