SH_MEM_BASES
tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE,
tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE,
tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE,
sh_mem_bases = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
sh_mem_bases = REG_SET_FIELD(sh_mem_bases, SH_MEM_BASES, SHARED_BASE,
tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE,
tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE,
tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE,
WREG32(SH_MEM_BASES, 0);
radeon_ring_write(ring, SH_MEM_BASES >> 2);
radeon_ring_write(ring, SH_MEM_BASES >> 2);