Symbol: SH_CLK_MSTP8
arch/sh/kernel/cpu/sh2a/clock-sh7264.c
100
[MSTP32] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 2, 0), /* ADC */
arch/sh/kernel/cpu/sh2a/clock-sh7264.c
101
[MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */
arch/sh/kernel/cpu/sh2a/clock-sh7264.c
93
[MSTP77] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 7, 0), /* SCIF */
arch/sh/kernel/cpu/sh2a/clock-sh7264.c
94
[MSTP74] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 4, 0), /* VDC */
arch/sh/kernel/cpu/sh2a/clock-sh7264.c
95
[MSTP72] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 2, 0), /* CMT */
arch/sh/kernel/cpu/sh2a/clock-sh7264.c
96
[MSTP60] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR6, 0, 0), /* USB */
arch/sh/kernel/cpu/sh2a/clock-sh7264.c
97
[MSTP35] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 6, 0), /* MTU2 */
arch/sh/kernel/cpu/sh2a/clock-sh7264.c
98
[MSTP34] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 4, 0), /* SDHI0 */
arch/sh/kernel/cpu/sh2a/clock-sh7264.c
99
[MSTP33] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 3, 0), /* SDHI1 */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
123
[MSTP72] = SH_CLK_MSTP8(&peripheral0_clk, STBCR7, 2, 0), /* CMT */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
124
[MSTP60] = SH_CLK_MSTP8(&peripheral1_clk, STBCR6, 0, 0), /* USB */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
125
[MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
126
[MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
127
[MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
128
[MSTP44] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 4, 0), /* SCIF3 */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
129
[MSTP43] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 3, 0), /* SCIF4 */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
130
[MSTP42] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 2, 0), /* SCIF5 */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
131
[MSTP41] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 1, 0), /* SCIF6 */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
132
[MSTP40] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 0, 0), /* SCIF7 */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
133
[MSTP35] = SH_CLK_MSTP8(&peripheral0_clk, STBCR3, 5, 0), /* MTU2 */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
134
[MSTP32] = SH_CLK_MSTP8(&peripheral1_clk, STBCR3, 2, 0), /* ADC */
arch/sh/kernel/cpu/sh2a/clock-sh7269.c
135
[MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */