SD_CTL_DMA_START
0, SD_CTL_DMA_START | SD_INT_MASK);
0, SD_CTL_DMA_START | SD_INT_MASK);
SD_CTL_DMA_START | SD_INT_MASK, 0);
dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START;
SD_CTL_DMA_START) {
snd_hdac_stream_updateb(cl, SD_CTL, SD_INT_MASK | SD_CTL_DMA_START,
SD_INT_MASK | SD_CTL_DMA_START);
return snd_hdac_stream_readb_poll(cl, SD_CTL, reg, reg & SD_CTL_DMA_START,
snd_hdac_stream_updateb(cl, SD_CTL, SD_INT_MASK | SD_CTL_DMA_START, 0);
ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, !(reg & SD_CTL_DMA_START),