SE_GENI_CLK_SEL
writel_relaxed(0, gi2c->se.base + SE_GENI_CLK_SEL);
writel(clk_sel, se->base + SE_GENI_CLK_SEL);
writel(clk_idx & CLK_SEL_MSK, uport->membase + SE_GENI_CLK_SEL);