Symbol: SERDES6G
drivers/phy/microchip/lan966x_serdes.c
69
SERDES_MUX_QSGMII(SERDES6G(1), 0, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/microchip/lan966x_serdes.c
71
SERDES_MUX_QSGMII(SERDES6G(1), 1, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/microchip/lan966x_serdes.c
73
SERDES_MUX_QSGMII(SERDES6G(1), 2, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/microchip/lan966x_serdes.c
75
SERDES_MUX_QSGMII(SERDES6G(1), 3, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/microchip/lan966x_serdes.c
78
SERDES_MUX_QSGMII(SERDES6G(2), 4, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/microchip/lan966x_serdes.c
80
SERDES_MUX_QSGMII(SERDES6G(2), 5, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/microchip/lan966x_serdes.c
82
SERDES_MUX_QSGMII(SERDES6G(2), 6, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/microchip/lan966x_serdes.c
84
SERDES_MUX_QSGMII(SERDES6G(2), 7, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/microchip/lan966x_serdes.c
92
SERDES_MUX_SGMII(SERDES6G(0), 0, HSIO_HW_CFG_SD6G_0_CFG, 0),
drivers/phy/microchip/lan966x_serdes.c
93
SERDES_MUX_SGMII(SERDES6G(1), 1, HSIO_HW_CFG_SD6G_1_CFG, 0),
drivers/phy/microchip/lan966x_serdes.c
94
SERDES_MUX_SGMII(SERDES6G(0), 2, HSIO_HW_CFG_SD6G_0_CFG,
drivers/phy/microchip/lan966x_serdes.c
96
SERDES_MUX_SGMII(SERDES6G(1), 3, HSIO_HW_CFG_SD6G_1_CFG,
drivers/phy/microchip/lan966x_serdes.c
99
SERDES_MUX_SGMII(SERDES6G(2), 4, 0, 0),
drivers/phy/mscc/phy-ocelot-serdes.c
382
SERDES_MUX_QSGMII(SERDES6G(0), 4, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/mscc/phy-ocelot-serdes.c
384
SERDES_MUX_QSGMII(SERDES6G(0), 5, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/mscc/phy-ocelot-serdes.c
386
SERDES_MUX_QSGMII(SERDES6G(0), 6, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/mscc/phy-ocelot-serdes.c
388
SERDES_MUX_SGMII(SERDES6G(0), 7, HSIO_HW_CFG_QSGMII_ENA, 0),
drivers/phy/mscc/phy-ocelot-serdes.c
389
SERDES_MUX_QSGMII(SERDES6G(0), 7, HSIO_HW_CFG_QSGMII_ENA,
drivers/phy/mscc/phy-ocelot-serdes.c
391
SERDES_MUX_SGMII(SERDES6G(1), 8, 0, 0),
drivers/phy/mscc/phy-ocelot-serdes.c
392
SERDES_MUX_SGMII(SERDES6G(2), 10, HSIO_HW_CFG_PCIE_ENA |
drivers/phy/mscc/phy-ocelot-serdes.c
394
SERDES_MUX(SERDES6G(2), 10, PHY_MODE_PCIE, 0, HSIO_HW_CFG_PCIE_ENA,
drivers/phy/mscc/phy-ocelot-serdes.c
462
if (idx != SERDES6G(0) && macro->port >= 0)
include/dt-bindings/phy/phy-lan966x-serdes.h
9
#define SERDES6G_MAX SERDES6G(3)
include/dt-bindings/phy/phy-ocelot-serdes.h
9
#define SERDES6G_MAX SERDES6G(2)
scripts/dtc/include-prefixes/dt-bindings/phy/phy-lan966x-serdes.h
9
#define SERDES6G_MAX SERDES6G(3)
scripts/dtc/include-prefixes/dt-bindings/phy/phy-ocelot-serdes.h
9
#define SERDES6G_MAX SERDES6G(2)