SCFG_OFFSET
writel(BIT(0), tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX);
SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL1_GEN1);
writel(val, tegra->sata_regs + SCFG_OFFSET +
SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL1_GEN2);
writel(val, tegra->sata_regs + SCFG_OFFSET +
tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL11);
tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL2);
writel(0, tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL17_0);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL18_0);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL20_0);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL21_0);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_9);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_IDP1);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1);