arch/arm/mach-sa1100/assabet.c

124

GPSR = SDA;

arch/arm/mach-sa1100/assabet.c

126

GPCR = SDA;

arch/arm/mach-sa1100/assabet.c

133

GPSR = SDA;

arch/arm/mach-sa1100/assabet.c

145

GPSR = SDA;

arch/arm/mach-sa1100/assabet.c

147

GPCR = SDA;

arch/arm/mach-sa1100/assabet.c

154

GPSR = SDA;

arch/arm/mach-sa1100/assabet.c

156

GPDR &= ~SDA;

arch/arm/mach-sa1100/assabet.c

159

if (GPLR & SDA)

arch/arm/mach-sa1100/assabet.c

162

GPCR = SCK | SDA;

arch/arm/mach-sa1100/assabet.c

164

GPDR |= SDA;

arch/arm/mach-sa1100/assabet.c

176

GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */

arch/arm/mach-sa1100/assabet.c

177

GPDR = (GPDR | SCK | MOD) & ~SDA;

arch/arm/mach-sa1100/assabet.c

179

if (!(GPLR & SDA))

arch/arm/mach-sa1100/assabet.c

181

GPDR |= SDA;

arch/arm/mach-sa1100/assabet.c

190

GPSR = gplr & (SDA | SCK | MOD);

arch/arm/mach-sa1100/assabet.c

191

GPCR = (~gplr) & (SDA | SCK | MOD);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

109

write_bit_to_ddc(ddc_handle, SDA, (byte >> shift) & 1);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

130

write_bit_to_ddc(ddc_handle, SDA, true);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

141

ack = !read_bit_from_ddc(ddc_handle, SDA);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

173

if (read_bit_from_ddc(ddc_handle, SDA))

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

193

write_bit_to_ddc(ddc_handle, SDA, !more);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

206

write_bit_to_ddc(ddc_handle, SDA, true);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

227

write_bit_to_ddc(ddc_handle, SDA, false);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

236

write_bit_to_ddc(ddc_handle, SDA, true);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

241

if (read_bit_from_ddc(ddc_handle, SDA))

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

312

write_bit_to_ddc(ddc_handle, SDA, true);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

314

if (!read_bit_from_ddc(ddc_handle, SDA)) {

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

326

write_bit_to_ddc(ddc_handle, SDA, false);

drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h

173

DDC_I2C_REG_LIST(SDA)\

drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h

192

DDC_I2C_REG_LIST_DCN2(SDA)\

drivers/i2c/busses/i2c-acorn.c

32

u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA);

drivers/i2c/busses/i2c-acorn.c

47

u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA);

drivers/i2c/busses/i2c-acorn.c

51

ones |= SDA;

drivers/i2c/busses/i2c-acorn.c

53

ones &= ~SDA;

drivers/i2c/busses/i2c-acorn.c

67

return (ioc_readb(IOC_CONTROL) & SDA) != 0;

drivers/i2c/busses/i2c-acorn.c

87

force_ones = FORCE_ONES | SCL | SDA;

drivers/i2c/busses/i2c-versatile.c

33

writel(SDA, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC));

drivers/i2c/busses/i2c-versatile.c

46

return !!(readl(i2c->base + I2C_CONTROL) & SDA);

drivers/i2c/busses/i2c-versatile.c

77

writel(SCL | SDA, i2c->base + I2C_CONTROLS);

drivers/rtc/rtc-rs5c313.c

108

scsptr1_data = (scsptr1_data & ~SDA) |

drivers/rtc/rtc-rs5c313.c

135

data |= ((__raw_readb(SCSPTR1) & SDA) >> 2) << (7 - i);

drivers/scsi/nsp32.c

3208

if (bit != SDA) {

drivers/scsi/nsp32.c

3231

nsp32_prom_set(data, SDA, 1);

drivers/scsi/nsp32.c

3233

nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting

drivers/scsi/nsp32.c

3242

nsp32_prom_set(data, SDA, 0);

drivers/scsi/nsp32.c

3244

nsp32_prom_set(data, SDA, 1);

drivers/scsi/nsp32.c

3251

nsp32_prom_set(data, SDA, val);

drivers/scsi/nsp32.c

3264

val = nsp32_prom_get(data, SDA);