SCU1_CLK_SEL2
SCU1_CLK_APLL, SCU1_CLK_SEL2, 8, 3, ast2700_clk_div_table),
SCU1_CLK_SEL2, 20, 3, ast2700_clk_div_table),
SCU1_CLK_SEL2, 23, 3, ast2700_clk_div_table),
uxclk_parent_hws, SCU1_CLK_SEL2, 0, 2),
uxclk_parent_hws, SCU1_CLK_SEL2, 3, 2),
val = readl(clk_ctrl->base + SCU1_CLK_SEL2) & ~SCU1_CLK_I3C_DIV_MASK;
writel(val, clk_ctrl->base + SCU1_CLK_SEL2);