Symbol: SCU0_RESET_CTRL1
drivers/reset/reset-aspeed.c
40
[SCU0_RESET_SDRAM] = { true, SCU0_RESET_CTRL1, BIT(0) },
drivers/reset/reset-aspeed.c
41
[SCU0_RESET_DDRPHY] = { true, SCU0_RESET_CTRL1, BIT(1) },
drivers/reset/reset-aspeed.c
42
[SCU0_RESET_RSA] = { true, SCU0_RESET_CTRL1, BIT(2) },
drivers/reset/reset-aspeed.c
43
[SCU0_RESET_SHA3] = { true, SCU0_RESET_CTRL1, BIT(3) },
drivers/reset/reset-aspeed.c
44
[SCU0_RESET_HACE] = { true, SCU0_RESET_CTRL1, BIT(4) },
drivers/reset/reset-aspeed.c
45
[SCU0_RESET_SOC] = { true, SCU0_RESET_CTRL1, BIT(5) },
drivers/reset/reset-aspeed.c
46
[SCU0_RESET_VIDEO] = { true, SCU0_RESET_CTRL1, BIT(6) },
drivers/reset/reset-aspeed.c
47
[SCU0_RESET_2D] = { true, SCU0_RESET_CTRL1, BIT(7) },
drivers/reset/reset-aspeed.c
48
[SCU0_RESET_PCIS] = { true, SCU0_RESET_CTRL1, BIT(8) },
drivers/reset/reset-aspeed.c
49
[SCU0_RESET_RVAS0] = { true, SCU0_RESET_CTRL1, BIT(9) },
drivers/reset/reset-aspeed.c
50
[SCU0_RESET_RVAS1] = { true, SCU0_RESET_CTRL1, BIT(10) },
drivers/reset/reset-aspeed.c
51
[SCU0_RESET_SM3] = { true, SCU0_RESET_CTRL1, BIT(11) },
drivers/reset/reset-aspeed.c
52
[SCU0_RESET_SM4] = { true, SCU0_RESET_CTRL1, BIT(12) },
drivers/reset/reset-aspeed.c
53
[SCU0_RESET_CRT0] = { true, SCU0_RESET_CTRL1, BIT(13) },
drivers/reset/reset-aspeed.c
54
[SCU0_RESET_ECC] = { true, SCU0_RESET_CTRL1, BIT(14) },
drivers/reset/reset-aspeed.c
55
[SCU0_RESET_DP_PCI] = { true, SCU0_RESET_CTRL1, BIT(15) },
drivers/reset/reset-aspeed.c
56
[SCU0_RESET_UFS] = { true, SCU0_RESET_CTRL1, BIT(16) },
drivers/reset/reset-aspeed.c
57
[SCU0_RESET_EMMC] = { true, SCU0_RESET_CTRL1, BIT(17) },
drivers/reset/reset-aspeed.c
58
[SCU0_RESET_PCIE1RST] = { true, SCU0_RESET_CTRL1, BIT(18) },
drivers/reset/reset-aspeed.c
59
[SCU0_RESET_PCIE1RSTOE] = { true, SCU0_RESET_CTRL1, BIT(19) },
drivers/reset/reset-aspeed.c
60
[SCU0_RESET_PCIE0RST] = { true, SCU0_RESET_CTRL1, BIT(20) },
drivers/reset/reset-aspeed.c
61
[SCU0_RESET_PCIE0RSTOE] = { true, SCU0_RESET_CTRL1, BIT(21) },
drivers/reset/reset-aspeed.c
62
[SCU0_RESET_JTAG] = { true, SCU0_RESET_CTRL1, BIT(22) },
drivers/reset/reset-aspeed.c
63
[SCU0_RESET_MCTP0] = { true, SCU0_RESET_CTRL1, BIT(23) },
drivers/reset/reset-aspeed.c
64
[SCU0_RESET_MCTP1] = { true, SCU0_RESET_CTRL1, BIT(24) },
drivers/reset/reset-aspeed.c
65
[SCU0_RESET_XDMA0] = { true, SCU0_RESET_CTRL1, BIT(25) },
drivers/reset/reset-aspeed.c
66
[SCU0_RESET_XDMA1] = { true, SCU0_RESET_CTRL1, BIT(26) },
drivers/reset/reset-aspeed.c
67
[SCU0_RESET_H2X1] = { true, SCU0_RESET_CTRL1, BIT(27) },
drivers/reset/reset-aspeed.c
68
[SCU0_RESET_DP] = { true, SCU0_RESET_CTRL1, BIT(28) },
drivers/reset/reset-aspeed.c
69
[SCU0_RESET_DP_MCU] = { true, SCU0_RESET_CTRL1, BIT(29) },
drivers/reset/reset-aspeed.c
70
[SCU0_RESET_SSP] = { true, SCU0_RESET_CTRL1, BIT(30) },
drivers/reset/reset-aspeed.c
71
[SCU0_RESET_H2X0] = { true, SCU0_RESET_CTRL1, BIT(31) },