SCTLR_EL1
r = vcpu_has_nv(vcpu) ? SCTLR_EL2 : SCTLR_EL1;
r = is_hyp_ctxt(vcpu) ? SCTLR_EL2 : SCTLR_EL1;
reg = SCTLR_EL1;
write_sysreg(read_sysreg(SCTLR_EL1) | SCTLR_ELx_ENTP2, SCTLR_EL1);
SYS_FIELD_PREP(SCTLR_EL1, TCF, tcf));
SYS_FIELD_PREP(SCTLR_EL1, TCSO, 1));
sctlr |= SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF0, ASYMM);
sctlr |= SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF0, ASYNC);
sctlr |= SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF0, SYNC);
sctlr |= SYS_FIELD_PREP(SCTLR_EL1, TCSO0, 1);
write_sysreg_el1(vcpu_read_sys_reg(vcpu, SCTLR_EL1), SYS_SCTLR);
sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);
vcpu_read_sys_reg(vcpu, SCTLR_EL1) :
sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);
wxn = (vcpu_read_sys_reg(vcpu, SCTLR_EL1) & SCTLR_ELx_WXN);
static const DECLARE_FEAT_MAP(sctlr_el1_desc, SCTLR_EL1,
case SCTLR_EL1:
sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1);
u32 sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1);
u32 sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1);
ctxt_sys_reg(ctxt, SCTLR_EL1) = read_sysreg_el1(SYS_SCTLR);
write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR);
write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR);
write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR);
resx = get_reg_fixed_bits(kvm, SCTLR_EL1);
set_sysreg_masks(kvm, SCTLR_EL1, resx);
case SCTLR_EL1:
MAPPED_EL2_SYSREG(SCTLR_EL2, SCTLR_EL1,
case SCTLR_EL1: val = read_sysreg_s(SYS_SCTLR_EL12); break;
case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break;
{ SYS_DESC(SYS_SCTLR_EL1), access_vm_reg, reset_val, SCTLR_EL1, 0x00C50078 },
{ Op1( 0), CRn( 1), CRm( 0), Op2( 0), access_vm_reg, NULL, SCTLR_EL1 },
SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF, NONE));
MAPPED_EL2_SYSREG(SCTLR_EL2, SCTLR_EL1);