drivers/gpu/drm/amd/display/dc/dce/dce_transform.c

449

SCL_V_2TAP_HARDCODE_COEF_EN, 0);

drivers/gpu/drm/amd/display/dc/dce/dce_transform.h

252

XFM_SF(SCL_VERT_FILTER_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_transform.h

422

XFM_SF(SCL0_SCL_VERT_FILTER_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_transform.h

521

type SCL_V_2TAP_HARDCODE_COEF_EN; \

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h

230

TF_SF(DSCL0_DSCL_2TAP_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh),\

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h

517

type SCL_V_2TAP_HARDCODE_COEF_EN; \

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

309

SCL_V_2TAP_HARDCODE_COEF_EN, v_2tap_hardcode_coef_en,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h

256

TF_SF(DSCL0_DSCL_2TAP_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh),\

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.h

101

TF_SF(DSCL0_DSCL_2TAP_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh),\

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

322

SCL_V_2TAP_HARDCODE_COEF_EN, v_2tap_hardcode_coef_en,