arch/powerpc/xmon/ppc-opc.c

605

#define SCLSCI8N SCLSCI8 + 1

arch/powerpc/xmon/ppc-opc.c

7010

{"e_cmpi", SCI8BF(6,0,21), SCI8BF_MASK, PPCVLE, 0, {CRD32, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7011

{"e_cmpwi", SCI8BF(6,0,21), SCI8BF_MASK, PPCVLE, 0, {CRD32, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7012

{"e_cmpli", SCI8BF(6,1,21), SCI8BF_MASK, PPCVLE, 0, {CRD32, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7013

{"e_cmplwi", SCI8BF(6,1,21), SCI8BF_MASK, PPCVLE, 0, {CRD32, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7014

{"e_addi", SCI8(6,16), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7016

{"e_addi.", SCI8(6,17), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7017

{"e_addic", SCI8(6,18), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7019

{"e_addic.", SCI8(6,19), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7021

{"e_mulli", SCI8(6,20), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7022

{"e_subfic", SCI8(6,22), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7023

{"e_subfic.", SCI8(6,23), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7024

{"e_andi", SCI8(6,24), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7025

{"e_andi.", SCI8(6,25), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7027

{"e_ori", SCI8(6,26), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7028

{"e_ori.", SCI8(6,27), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7029

{"e_xori", SCI8(6,28), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7030

{"e_xori.", SCI8(6,29), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},