drivers/clk/rockchip/clk-px30.c

684

GATE(SCLK_UART2, "clk_uart2", "clk_uart2_mux", CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3036.c

159

MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3128.c

194

MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3188.c

268

MUX(SCLK_UART2, "sclk_uart2", mux_sclk_uart2_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3228.c

208

MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3288.c

271

MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3308.c

357

GATE(SCLK_UART2, "clk_uart2", "clk_uart2_mux", CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3328.c

261

MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3368.c

409

MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3399.c

270

MUX(SCLK_UART2, "clk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3506.c

424

COMPOSITE(SCLK_UART2, "sclk_uart2", sclk_uart_parents_p, 0,

drivers/clk/rockchip/clk-rk3528.c

330

GATE(SCLK_UART2, "sclk_uart2", "clk_uart2", 0,

drivers/clk/rockchip/clk-rk3562.c

624

GATE(SCLK_UART2, "sclk_uart2", "clk_uart2", 0,

drivers/clk/rockchip/clk-rk3568.c

1232

GATE(SCLK_UART2, "sclk_uart2", "sclk_uart2_mux", 0,

drivers/clk/rockchip/clk-rk3576.c

669

COMPOSITE(SCLK_UART2, "sclk_uart2", clk_uart_p, 0,

drivers/clk/rockchip/clk-rk3588.c

1235

GATE(SCLK_UART2, "sclk_uart2", "clk_uart2", 0,

drivers/clk/rockchip/clk-rv1108.c

176

MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rv1126.c

477

GATE(SCLK_UART2, "sclk_uart2", "sclk_uart2_mux", 0,

drivers/clk/rockchip/clk-rv1126b.c

273

COMPOSITE(SCLK_UART2, "sclk_uart2", mux_sclk_uart_src_p, 0,

drivers/clk/samsung/clk-exynos7.c

779

GATE(SCLK_UART2, "sclk_uart2_user", "mout_sclk_uart2_user",

drivers/clk/samsung/clk-s5pv210.c

595

GATE(SCLK_UART2, "sclk_uart2", "dout_uart2", CLK_SRC_MASK0, 14,