drivers/clk/rockchip/clk-px30.c

671

GATE(SCLK_UART1, "clk_uart1", "clk_uart1_mux", CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3036.c

155

MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3128.c

190

MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3188.c

264

MUX(SCLK_UART1, "sclk_uart1", mux_sclk_uart1_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3228.c

204

MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3288.c

267

MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3308.c

347

GATE(SCLK_UART1, "clk_uart1", "clk_uart1_mux", 0,

drivers/clk/rockchip/clk-rk3328.c

257

MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3368.c

263

MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3399.c

266

MUX(SCLK_UART1, "clk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3506.c

421

COMPOSITE(SCLK_UART1, "sclk_uart1", sclk_uart_parents_p, 0,

drivers/clk/rockchip/clk-rk3528.c

320

GATE(SCLK_UART1, "sclk_uart1", "clk_uart1", 0,

drivers/clk/rockchip/clk-rk3562.c

615

GATE(SCLK_UART1, "sclk_uart1", "clk_uart1", 0,

drivers/clk/rockchip/clk-rk3568.c

1220

GATE(SCLK_UART1, "sclk_uart1", "sclk_uart1_mux", 0,

drivers/clk/rockchip/clk-rk3576.c

1661

COMPOSITE_NODIV(SCLK_UART1, "sclk_uart1", uart1_p, 0,

drivers/clk/rockchip/clk-rk3588.c

1226

GATE(SCLK_UART1, "sclk_uart1", "clk_uart1", 0,

drivers/clk/rockchip/clk-rv1108.c

172

MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rv1126.c

302

GATE(SCLK_UART1, "sclk_uart1", "sclk_uart1_mux", 0,

drivers/clk/rockchip/clk-rv1126b.c

270

COMPOSITE(SCLK_UART1, "sclk_uart1", mux_sclk_uart_src_p, 0,

drivers/clk/samsung/clk-exynos7.c

777

GATE(SCLK_UART1, "sclk_uart1_user", "mout_sclk_uart1_user",

drivers/clk/samsung/clk-s5pv210.c

597

GATE(SCLK_UART1, "sclk_uart1", "dout_uart1", CLK_SRC_MASK0, 13,