drivers/clk/rockchip/clk-rk3036.c

151

MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3128.c

186

MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3188.c

260

MUX(SCLK_UART0, "sclk_uart0", mux_sclk_uart0_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3228.c

200

MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3288.c

263

MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3308.c

337

GATE(SCLK_UART0, "clk_uart0", "clk_uart0_mux", 0,

drivers/clk/rockchip/clk-rk3328.c

253

MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3368.c

259

MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3399.c

262

MUX(SCLK_UART0, "clk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rk3506.c

418

COMPOSITE(SCLK_UART0, "sclk_uart0", sclk_uart_parents_p, 0,

drivers/clk/rockchip/clk-rk3528.c

310

GATE(SCLK_UART0, "sclk_uart0", "clk_uart0", 0,

drivers/clk/rockchip/clk-rk3568.c

1509

GATE(SCLK_UART0, "sclk_uart0", "sclk_uart0_mux", 0,

drivers/clk/rockchip/clk-rk3576.c

666

COMPOSITE(SCLK_UART0, "sclk_uart0", clk_uart_p, 0,

drivers/clk/rockchip/clk-rk3588.c

2266

GATE(SCLK_UART0, "sclk_uart0", "clk_uart0", 0,

drivers/clk/rockchip/clk-rv1108.c

168

MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,

drivers/clk/rockchip/clk-rv1126.c

466

GATE(SCLK_UART0, "sclk_uart0", "sclk_uart0_mux", 0,

drivers/clk/rockchip/clk-rv1126b.c

766

COMPOSITE_NODIV(SCLK_UART0, "sclk_uart0", sclk_uart0_p, CLK_SET_RATE_PARENT,

drivers/clk/samsung/clk-exynos7.c

672

GATE(SCLK_UART0, "sclk_uart0_user", "mout_sclk_uart0_user",

drivers/clk/samsung/clk-s5pv210.c

599

GATE(SCLK_UART0, "sclk_uart0", "dout_uart0", CLK_SRC_MASK0, 12,