Symbol: BANK_SELECT
drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c
238
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c
242
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c
243
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c
247
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
324
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
328
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
197
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
201
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
248
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
252
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
234
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
238
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
240
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
244
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
235
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
239
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c
240
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c
244
tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
644
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
862
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
183
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
187
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
225
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
229
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
299
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
303
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
290
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
294
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
220
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
224
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
253
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
257
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c
252
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c
256
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
252
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
256
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c
369
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c
373
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c
247
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c
251
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c
394
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c
398
tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
265
tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL3, BANK_SELECT, 12);
drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
269
tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL3, BANK_SELECT, 9);
drivers/gpu/drm/radeon/cik.c
5447
BANK_SELECT(4) |
drivers/gpu/drm/radeon/evergreen.c
2420
WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
drivers/gpu/drm/radeon/evergreen.c
2473
WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
drivers/gpu/drm/radeon/evergreen.c
2503
WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
drivers/gpu/drm/radeon/ni.c
1276
BANK_SELECT(6) |
drivers/gpu/drm/radeon/rv770.c
911
WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
drivers/gpu/drm/radeon/rv770.c
957
WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
drivers/gpu/drm/radeon/rv770.c
988
WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
drivers/gpu/drm/radeon/si.c
4293
BANK_SELECT(4) |
drivers/net/ethernet/microchip/encx24j600-regmap.c
24
int bank_opcode = BANK_SELECT(bank);
drivers/net/ethernet/smsc/smc9194.h
204
#define SMC_SELECT_BANK(x) { outw( x, ioaddr + BANK_SELECT ); }
drivers/net/ethernet/smsc/smc91x.h
897
#define SMC_CURRENT_BANK(lp) SMC_inw(ioaddr, BANK_SELECT)
drivers/net/ethernet/smsc/smc91x.h
904
SMC_outw(lp, x, ioaddr, BANK_SELECT); \