arch/arm/mach-s3c/regs-sys-s3c64xx.h

16

#define S3C64XX_AHB_CON0 S3C_SYSREG(0x100)

arch/arm/mach-s3c/regs-sys-s3c64xx.h

17

#define S3C64XX_AHB_CON1 S3C_SYSREG(0x104)

arch/arm/mach-s3c/regs-sys-s3c64xx.h

18

#define S3C64XX_AHB_CON2 S3C_SYSREG(0x108)

arch/arm/mach-s3c/regs-sys-s3c64xx.h

20

#define S3C64XX_SDMA_SEL S3C_SYSREG(0x110)

arch/arm/mach-s3c/regs-sys-s3c64xx.h

22

#define S3C64XX_OTHERS S3C_SYSREG(0x900)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

107

#define S3C64XX_INFORM0 S3C_SYSREG(0xA00)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

108

#define S3C64XX_INFORM1 S3C_SYSREG(0xA04)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

109

#define S3C64XX_INFORM2 S3C_SYSREG(0xA08)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

110

#define S3C64XX_INFORM3 S3C_SYSREG(0xA0C)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

14

#define S3C64XX_PWR_CFG S3C_SYSREG(0x804)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

44

#define S3C64XX_EINT_MASK S3C_SYSREG(0x808)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

46

#define S3C64XX_NORMAL_CFG S3C_SYSREG(0x810)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

57

#define S3C64XX_STOP_CFG S3C_SYSREG(0x814)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

65

#define S3C64XX_SLEEP_CFG S3C_SYSREG(0x818)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

69

#define S3C64XX_STOP_MEM_CFG S3C_SYSREG(0x81c)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

79

#define S3C64XX_OSC_STABLE S3C_SYSREG(0x824)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

80

#define S3C64XX_PWR_STABLE S3C_SYSREG(0x828)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

82

#define S3C64XX_WAKEUP_STAT S3C_SYSREG(0x908)

arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h

96

#define S3C64XX_BLK_PWR_STAT S3C_SYSREG(0x90c)