RZG2L_PCTRL_REG_ACCESS32
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + PFC(off), cache->pfc[port]);
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + IOLH(off),
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + IOLH(off) + 4,
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + PUPD(off),
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + PUPD(off) + 4,
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + IEN(off),
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + IEN(off) + 4,
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + SMT(off),
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + SMT(off) + 4,
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + SR(off),
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + SR(off) + 4,
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + NOD(off),
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + NOD(off) + 4,
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + IOLH(off),
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + IEN(off),
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + SR(off),
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + NOD(off),
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + PUPD(off),
RZG2L_PCTRL_REG_ACCESS32(suspend,
RZG2L_PCTRL_REG_ACCESS32(suspend,
RZG2L_PCTRL_REG_ACCESS32(suspend,
RZG2L_PCTRL_REG_ACCESS32(suspend,
RZG2L_PCTRL_REG_ACCESS32(suspend,