S3C_ADDR
#define S5P_VA_CHIPID S3C_ADDR(0x02000000)
#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
#define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */
#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
#define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x))
#define S3C_VA_SYS S3C_ADDR(0x00100000)