drivers/gpu/drm/gma500/cdv_device.c

125

blc_pwm_ctl = REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/gma500/cdv_device.c

95

u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/gma500/cdv_intel_lvds.c

241

BACKLIGHT_DUTY_CYCLE_MASK);

drivers/gpu/drm/gma500/cdv_intel_lvds.c

92

REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/gma500/cdv_intel_lvds.c

99

~BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/gma500/oaktrail_lvds.c

168

BACKLIGHT_DUTY_CYCLE_MASK);

drivers/gpu/drm/gma500/psb_intel_lvds.c

191

blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/gma500/psb_intel_lvds.c

200

~BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/gma500/psb_intel_lvds.c

274

BACKLIGHT_DUTY_CYCLE_MASK);

drivers/gpu/drm/gma500/psb_intel_lvds.c

436

BACKLIGHT_DUTY_CYCLE_MASK);

drivers/gpu/drm/i915/display/intel_backlight.c

153

return intel_de_read(display, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/i915/display/intel_backlight.c

160

return intel_de_read(display, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/i915/display/intel_backlight.c

169

val = intel_de_read(display, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/i915/display/intel_backlight.c

191

return intel_de_read(display, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/i915/display/intel_backlight.c

217

val = intel_de_read(display, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/i915/display/intel_backlight.c

227

tmp = intel_de_read(display, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/i915/display/intel_backlight.c

251

mask = BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/i915/display/intel_backlight.c

268

tmp = intel_de_read(display, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;