R_SRAM_IQRX
rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000);
rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD,
rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD,
rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00000000);
rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000);
rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000 + i);
rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000 + i);
rtw89_phy_write32_clr(rtwdev, R_SRAM_IQRX, MASKDWORD);
rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000 | addr);