R_S0_HW_SI_DIS
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx);
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx);
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS,
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS,
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS,
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS,
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx);
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx);
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS,
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS,
rtw89_phy_write32_mask(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG,
rtw89_phy_write32_mask(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG,
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS,
rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS,