Symbol: R_IMR_MAILBOX_CLR_CPU
arch/mips/sibyte/sb1250/irq.c
256
IOADDR(A_IMR_REGISTER(0, R_IMR_MAILBOX_CLR_CPU)));
arch/mips/sibyte/sb1250/irq.c
258
IOADDR(A_IMR_REGISTER(1, R_IMR_MAILBOX_CLR_CPU)));
arch/mips/sibyte/sb1250/smp.c
26
IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU),
arch/mips/sibyte/sb1250/smp.c
27
IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU)