R_BE_SS_CTRL

1100

reg = R_BE_SS_CTRL;

979

rtw89_write8_set(rtwdev, R_BE_SS_CTRL, B_BE_SS_EN);

982

1, TRXCFG_WAIT_CNT, false, rtwdev, R_BE_SS_CTRL);

988

rtw89_write32_set(rtwdev, R_BE_SS_CTRL, B_BE_WARM_INIT);

989

rtw89_write32_clr(rtwdev, R_BE_SS_CTRL, B_BE_BAND_TRIG_EN | B_BE_BAND1_TRIG_EN);