Symbol: R_BCM1480_IMR_MAILBOX_0_CPU
arch/mips/include/asm/sibyte/bcm1480_regs.h
421
(R_BCM1480_IMR_MAILBOX_0_CPU + reg))
arch/mips/sibyte/bcm1480/smp.c
40
IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
arch/mips/sibyte/bcm1480/smp.c
41
IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
arch/mips/sibyte/bcm1480/smp.c
42
IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
arch/mips/sibyte/bcm1480/smp.c
43
IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),