RTS
ctrl.RTS = 0;
port->ctrl_ul.RTS = rts;
return (ctrl_ul->RTS ? TIOCM_RTS : 0)
unsigned int RTS:1;
unsigned int RTS:1;
set_bits |= RTS;
clear_bits |= RTS;
write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR);
set_bits |= RTS;
clear_bits |= RTS;
write_zsreg(uap, 5, Tx8 | RTS);
uap->curregs[R5] = Tx8 | RTS;
set_bits |= RTS;
clear_bits |= RTS;
zport_a->regs[5] |= RTS;
zport_a->regs[5] &= ~RTS;