drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

420

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, 0x1ULL);

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

439

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, 0x1ULL);

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

426

intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT);

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

443

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT,

drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c

23

pf_trig_val = otx2_read64(pf, RVU_PF_INT) & 0x3ULL;

drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c

26

otx2_write64(pf, RVU_PF_INT, pf_trig_val);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

1054

otx2_write64(pf, RVU_PF_INT, BIT_ULL(0));

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

1154

otx2_write64(pf, RVU_PF_INT, BIT_ULL(0));

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

1157

otx2_write64(pf, RVU_PF_INT, BIT_ULL(0) | BIT_ULL(1));