arch/riscv/include/asm/insn.h

195

#define RVG_MATCH_BEQ (RV_ENCODE_FUNCT3(BEQ) | RVG_OPCODE_BRANCH)

arch/riscv/include/asm/insn.h

196

#define RVG_MATCH_BNE (RV_ENCODE_FUNCT3(BNE) | RVG_OPCODE_BRANCH)

arch/riscv/include/asm/insn.h

197

#define RVG_MATCH_BLT (RV_ENCODE_FUNCT3(BLT) | RVG_OPCODE_BRANCH)

arch/riscv/include/asm/insn.h

198

#define RVG_MATCH_BGE (RV_ENCODE_FUNCT3(BGE) | RVG_OPCODE_BRANCH)

arch/riscv/include/asm/insn.h

199

#define RVG_MATCH_BLTU (RV_ENCODE_FUNCT3(BLTU) | RVG_OPCODE_BRANCH)

arch/riscv/include/asm/insn.h

200

#define RVG_MATCH_BGEU (RV_ENCODE_FUNCT3(BGEU) | RVG_OPCODE_BRANCH)

arch/riscv/include/asm/insn.h

234

#define __INSN_BRANCH_OPCODE _UL(RVG_OPCODE_BRANCH)

arch/riscv/include/asm/insn.h

275

return (code & RV_INSN_OPCODE_MASK) == RVG_OPCODE_BRANCH;