RTW_RF_PATH_MAX
u32 rf_base_addr[RTW_RF_PATH_MAX];
u32 rf_sipi_addr[RTW_RF_PATH_MAX];
const struct rtw_table *rf_tbl[RTW_RF_PATH_MAX];
u8 result[RTW_RF_PATH_MAX];
u8 dpk_txagc[RTW_RF_PATH_MAX];
u32 coef[RTW_RF_PATH_MAX][20];
u16 dpk_gs[RTW_RF_PATH_MAX];
u8 thermal_dpk_delta[RTW_RF_PATH_MAX];
u8 pre_pwsf[RTW_RF_PATH_MAX];
const u8 *p[RTW_RF_PATH_MAX];
const u8 *n[RTW_RF_PATH_MAX];
u32 rf3f_bp[RF_BAND_MAX][RF_GAIN_NUM][RTW_RF_PATH_MAX];
u32 rf3f_fs[RTW_RF_PATH_MAX][RF_GAIN_NUM];
s8 offset[RF_GAIN_NUM][RTW_RF_PATH_MAX];
s8 fianl_offset[RF_GAIN_NUM][RTW_RF_PATH_MAX];
s32 cfo_tail[RTW_RF_PATH_MAX];
s32 cfo_cnt[RTW_RF_PATH_MAX];
u8 thermal_avg[RTW_RF_PATH_MAX];
s8 delta_power_index[RTW_RF_PATH_MAX];
s8 delta_power_index_last[RTW_RF_PATH_MAX];
struct ewma_thermal avg_thermal[RTW_RF_PATH_MAX];
s8 txagc_remnant_ofdm[RTW_RF_PATH_MAX];
u32 dack_adck[RTW_RF_PATH_MAX];
u16 dack_msbk[RTW_RF_PATH_MAX][2][DACK_MSBK_BACKUP_NUM];
u8 dack_dck[RTW_RF_PATH_MAX][2][DACK_DCK_BACKUP_NUM];
u8 cck_pd_lv[2][RTW_RF_PATH_MAX];
s8 rx_snr[RTW_RF_PATH_MAX];
u8 rx_evm_dbm[RTW_RF_PATH_MAX];
s16 cfo_tail[RTW_RF_PATH_MAX];
u8 rssi[RTW_RF_PATH_MAX];
u8 thermal_meter[RTW_RF_PATH_MAX];
union rtw_sar_cfg cfg[RTW_RF_PATH_MAX][RTW_RATE_SECTION_NUM];
s8 tx_pwr_by_rate_offset_2g[RTW_RF_PATH_MAX]
s8 tx_pwr_by_rate_offset_5g[RTW_RF_PATH_MAX]
s8 tx_pwr_by_rate_base_2g[RTW_RF_PATH_MAX]
s8 tx_pwr_by_rate_base_5g[RTW_RF_PATH_MAX]
s8 tx_pwr_tbl[RTW_RF_PATH_MAX]
s8 rx_power[RTW_RF_PATH_MAX];
s8 rx_snr[RTW_RF_PATH_MAX];
u8 rx_evm[RTW_RF_PATH_MAX];
s8 cfo_tail[RTW_RF_PATH_MAX];
for (j = 0; j < RTW_RF_PATH_MAX; j++)
u8 rates[RTW_RF_PATH_MAX] = {0};
s8 pwr_by_rate[RTW_RF_PATH_MAX] = {0};
if (WARN_ON(rfpath >= RTW_RF_PATH_MAX ||
rate_num > RTW_RF_PATH_MAX))
for (path = 0; path < RTW_RF_PATH_MAX; path++)
for (path = 0; path < RTW_RF_PATH_MAX; path++) {
u8 gain[RTW_RF_PATH_MAX], rssi, i;
s8 snr[RTW_RF_PATH_MAX];
s8 evm[RTW_RF_PATH_MAX];
for (i = RF_PATH_A; i < RTW_RF_PATH_MAX; i++) {
RTW_RF_PATH_MAX);
static const u16 iqk_apply[RTW_RF_PATH_MAX] = {
u32 tx_matrix[RTW_RF_PATH_MAX];
bool tx_ok[RTW_RF_PATH_MAX];
for (path = RF_PATH_A; path < RTW_RF_PATH_MAX; path++)
for (path = RF_PATH_A; path < RTW_RF_PATH_MAX; path++)
for (path = RF_PATH_A; path < RTW_RF_PATH_MAX; path++)
u32 rf_backup[RF_REG_NUM_8814][RTW_RF_PATH_MAX];
static const u32 txagc_reg[RTW_RF_PATH_MAX] = {
static const u32 txscale_reg[RTW_RF_PATH_MAX] = {
for (path = RF_PATH_A; path < RTW_RF_PATH_MAX; path++) {
s8 rx_power[RTW_RF_PATH_MAX];
rtw8822c_cck_pd_reg[RTW_CHANNEL_WIDTH_40 + 1][RTW_RF_PATH_MAX] = {
if (WARN_ON(bw > RTW_CHANNEL_WIDTH_40 || nrx >= RTW_RF_PATH_MAX))
u8 gain[RTW_RF_PATH_MAX], rssi, i;
s8 remnant_pre[RTW_RF_PATH_MAX];
for (j = 0; j < RTW_RF_PATH_MAX; j++) {