RTW89_PHY_1
return phy_idx == RTW89_PHY_1;
case RTW89_PHY_1:
gnt = &dm->gnt.band[RTW89_PHY_1];
(rtwdev->dbcc_en && dbcc_2g_phy != RTW89_PHY_1))
if (wl_dinfo->real_band[RTW89_PHY_1] == RTW89_BAND_2G)
RTW89_PHY_1);
} else if (dbcc_en && (dbcc_2g_phy != RTW89_PHY_1)) {
RTW89_PHY_1);
wl_dinfo->real_band[RTW89_PHY_1] != RTW89_BAND_2G)
if (dbcc_2g_phy == RTW89_PHY_1)
pta_req_band = RTW89_PHY_1;
if (dbcc_2g_phy == RTW89_PHY_1)
_update_dbcc_band(rtwdev, RTW89_PHY_1);
wl_rinfo->dbcc_2g_phy = RTW89_PHY_1;
wl_rinfo->dbcc_2g_phy = RTW89_PHY_1;
!!(FIELD_GET(BTC_RFK_PHY_MAP, phy_map) & BIT(RTW89_PHY_1)),
u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
__rtw89_core_set_chip_txpwr(rtwdev, chan, RTW89_PHY_1);
__rtw89_set_channel(rtwdev, chan, RTW89_MAC_1, RTW89_PHY_1);
rtwdev->bbs[RTW89_PHY_1].phy_idx = RTW89_PHY_1;
chip->ops->bb_preinit(rtwdev, RTW89_PHY_1);
chip->ops->bb_postinit(rtwdev, RTW89_PHY_1);
chip->ops->set_txpwr_ctrl(rtwdev, RTW89_PHY_1);
__rtw89_chip_init_txpwr_unit(rtwdev, RTW89_PHY_1);
return BIT(RTW89_PHY_1);
return BIT(RTW89_PHY_0) | BIT(RTW89_PHY_1);
for (u8 __phy_idx_max = rtwdev->dbcc_en ? RTW89_PHY_1 : RTW89_PHY_0, \
path = rtwvif_link->phy_idx == RTW89_PHY_1 ? RF_PATH_B : RF_PATH_A;
rtw89_set_entity_state(rtwdev, RTW89_PHY_1, false);
__rtw89_phy_bb_reset(rtwdev, RTW89_PHY_1);
if ((uintptr_t)extra_data == RTW89_PHY_1)
(void *)RTW89_PHY_1);
rtw89_phy_write32_idx(rtwdev, addr, mask, val, RTW89_PHY_1);
if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1)
if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1)
if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1)
if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1)
rtw89_phy_write32_idx(rtwdev, addr, mask, val, RTW89_PHY_1);
__rtw89_physts_parsing_init(rtwdev, RTW89_PHY_1);
if (bb->phy_idx == RTW89_PHY_1)
edcca_p_regs = &edcca_regs->p[RTW89_PHY_1];
enum rtw89_phy_idx phy_idx = mac_idx != RTW89_MAC_0 ? RTW89_PHY_1 : RTW89_PHY_0;
rtw8851b_set_txpwr_ul_tb_offset(rtwdev, 0, phy_idx == RTW89_PHY_1 ?
rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0x0, RTW89_PHY_1);
rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 7, RTW89_PHY_1);
RTW89_PHY_1);
RTW89_PHY_1);
phy_idx = RTW89_PHY_1;
rtw8852bx_set_txpwr_ul_tb_offset(rtwdev, 0, phy_idx == RTW89_PHY_1 ?
phy_idx = RTW89_PHY_1;
rtw8852c_spur_notch(rtwdev, 0xe7f, RTW89_PHY_1);
rtw8852c_spur_notch(rtwdev, 0x280, RTW89_PHY_1);
rtw8852c_spur_notch(rtwdev, 0xe7f, RTW89_PHY_1);
rtw8852c_spur_notch(rtwdev, 0x280, RTW89_PHY_1);
gain->offset_base[RTW89_PHY_1] =
rtw8852c_set_txpwr_ul_tb_offset(rtwdev, 0, phy_idx == RTW89_PHY_1 ?
RTW89_PHY_1);
RTW89_PHY_1);
RTW89_PHY_1);
B_RXHT_MCS_LIMIT, 0, RTW89_PHY_1);
B_RXVHT_MCS_LIMIT, 0, RTW89_PHY_1);
RTW89_PHY_1);
RTW89_PHY_1);
RTW89_PHY_1);
rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0, RTW89_PHY_1);
} else if (phy == RTW89_PHY_1) {
} else if (phy == RTW89_PHY_1) {
} else if (phy == RTW89_PHY_1) {
_tssi_set_efuse_to_de(rtwdev, RTW89_PHY_1, chan);
} else if (phy == RTW89_PHY_1) {
} else if (phy == RTW89_PHY_1) {
if (phy_idx == RTW89_PHY_1)
if (phy_idx == RTW89_PHY_1 && !rtwdev->dbcc_en)
__rtw8922a_rfk_init_late(rtwdev, RTW89_PHY_1, chan);
for (phy_idx = RTW89_PHY_0; phy_idx <= RTW89_PHY_1; phy_idx++) {
rtw8922a_hal_reset(rtwdev, RTW89_PHY_1, RTW89_MAC_1, band,
rtw8922a_hal_reset(rtwdev, RTW89_PHY_1, RTW89_MAC_1, band,