arch/sh/boards/mach-highlander/irq-r7780mp.c

37

INTC_IRQ(RTC, IRQ_RTC),

arch/sh/boards/mach-highlander/irq-r7780mp.c

48

{ SCIF0, SCIF1, RTC, 0, CF, 0, TP, SMBUS,

arch/sh/boards/mach-highlander/irq-r7785rp.c

33

INTC_IRQ(RTC, IRQ_RTC),

arch/sh/boards/mach-highlander/irq-r7785rp.c

48

RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } },

arch/sh/kernel/cpu/sh2a/setup-sh7201.c

159

{ 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },

arch/sh/kernel/cpu/sh2a/setup-sh7201.c

88

INTC_IRQ(RTC, 152), INTC_IRQ(RTC, 153),

arch/sh/kernel/cpu/sh2a/setup-sh7201.c

89

INTC_IRQ(RTC, 154),

arch/sh/kernel/cpu/sh2a/setup-sh7203.c

107

INTC_IRQ(RTC, 231), INTC_IRQ(RTC, 232),

arch/sh/kernel/cpu/sh2a/setup-sh7203.c

108

INTC_IRQ(RTC, 233),

arch/sh/kernel/cpu/sh2a/setup-sh7203.c

155

{ 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, 0, RTC, RCAN0 } },

arch/sh/kernel/cpu/sh2a/setup-sh7203.c

160

{ 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } },

arch/sh/kernel/cpu/sh2a/setup-sh7264.c

163

INTC_IRQ(RTC, 296), INTC_IRQ(RTC, 297),

arch/sh/kernel/cpu/sh2a/setup-sh7264.c

164

INTC_IRQ(RTC, 298),

arch/sh/kernel/cpu/sh2a/setup-sh7264.c

213

{ 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { NFMC, SDHI, RTC, 0 } },

arch/sh/kernel/cpu/sh2a/setup-sh7269.c

180

INTC_IRQ(RTC, 338), INTC_IRQ(RTC, 339),

arch/sh/kernel/cpu/sh2a/setup-sh7269.c

181

INTC_IRQ(RTC, 340),

arch/sh/kernel/cpu/sh2a/setup-sh7269.c

235

{ 0xfffe0c26, 0, 16, 4, /* IPR25 */ { SDHI0, SDHI1, RTC, 0 } },

arch/sh/kernel/cpu/sh3/setup-sh7705.c

49

INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),

arch/sh/kernel/cpu/sh3/setup-sh7705.c

50

INTC_VECT(RTC, 0x4c0),

arch/sh/kernel/cpu/sh3/setup-sh7705.c

56

{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },

arch/sh/kernel/cpu/sh3/setup-sh770x.c

38

INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),

arch/sh/kernel/cpu/sh3/setup-sh770x.c

39

INTC_VECT(RTC, 0x4c0),

arch/sh/kernel/cpu/sh3/setup-sh770x.c

68

{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },

arch/sh/kernel/cpu/sh3/setup-sh7710.c

51

INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),

arch/sh/kernel/cpu/sh3/setup-sh7710.c

52

INTC_VECT(RTC, 0x4c0),

arch/sh/kernel/cpu/sh3/setup-sh7710.c

58

{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },

arch/sh/kernel/cpu/sh3/setup-sh7720.c

239

INTC_VECT(TMU2, 0x440), INTC_VECT(RTC, 0x480),

arch/sh/kernel/cpu/sh3/setup-sh7720.c

240

INTC_VECT(RTC, 0x4a0), INTC_VECT(RTC, 0x4c0),

arch/sh/kernel/cpu/sh3/setup-sh7720.c

267

{ 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },

arch/sh/kernel/cpu/sh4/setup-sh7750.c

195

INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),

arch/sh/kernel/cpu/sh4/setup-sh7750.c

196

INTC_VECT(RTC, 0x4c0),

arch/sh/kernel/cpu/sh4/setup-sh7750.c

206

{ 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

582

INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

631

{ 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, RTC } },

arch/sh/kernel/cpu/sh4a/setup-sh7723.c

571

INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI),

arch/sh/kernel/cpu/sh4a/setup-sh7723.c

620

{ 0xa4080028, 0, 16, 4, /* IPRK */ { RTC,DMAC1B,0,SDHI0 } },

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

1007

INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

1072

{ 0xa4080028, 0, 16, 4, /* IPRK */ { RTC, DMAC1B, 0, SDHI0 } },

arch/sh/kernel/cpu/sh4a/setup-sh7734.c

413

INTC_VECT(RTC, 0xC00),

arch/sh/kernel/cpu/sh4a/setup-sh7734.c

492

RTC,

arch/sh/kernel/cpu/sh4a/setup-sh7734.c

503

{ TMU30, TMU60, RTC, SDHI } },

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

254

INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

255

INTC_VECT(RTC, 0x4c0),

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

306

HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

317

{ 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

315

INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

316

INTC_VECT(RTC, 0x4c0),

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

360

HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

366

{ 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },

drivers/clk/nxp/clk-lpc32xx.c

1226

LPC32XX_DEFINE_FIXED(RTC, 32768),

drivers/clk/nxp/clk-lpc32xx.c

200

LPC32XX_CLK_DEFINE(RTC, "rtc", 0x0, LPC32XX_CLK_XTAL_32K),

drivers/clk/stm32/clk-stm32mp1.c

2066

COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE,

drivers/clk/stm32/clk-stm32mp1.c

2130

RTC,

drivers/cpuidle/cpuidle-ux500.c

112

prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) |

drivers/media/dvb-frontends/stv0900_core.c

1033

stv0900_write_reg(intp, RTC, 0x88);

drivers/media/dvb-frontends/stv0900_sw.c

472

stv0900_write_reg(intp, RTC, 0x80);

drivers/media/dvb-frontends/stv0900_sw.c

492

stv0900_write_reg(intp, RTC, 0x88);

drivers/media/dvb-frontends/stv090x.c

1524

if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)

drivers/media/dvb-frontends/stv090x.c

2083

if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)

drivers/media/dvb-frontends/stv090x.c

2113

if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */

drivers/mfd/db8500-prcmu.c

307

IRQ_ENTRY(RTC),

drivers/mfd/db8500-prcmu.c

335

WAKEUP_ENTRY(RTC),

drivers/mfd/lp8788.c

110

MFD_DEV_WITH_RESOURCE(RTC, rtc_irqs, ARRAY_SIZE(rtc_irqs)),

drivers/net/ethernet/amd/xgbe/xgbe-dev.c

141

XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RTC, val);

drivers/net/ethernet/renesas/ravb_main.c

623

ravb_write(ndev, 0x7ffc0000 | priv->info->rx_max_frame_size, RTC);