RT5682_PWR_ANLG_1
regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
RT5682_PWR_ANLG_1,
RT5682_PWR_ANLG_1, RT5682_PWR_MB, 0);
RT5682_PWR_ANLG_1, RT5682_PWR_VREF2, 0);
RT5682_PWR_ANLG_1, RT5682_PWR_FV1, 0);
RT5682_PWR_ANLG_1, RT5682_PWR_FV2, 0);
RT5682_PWR_ANLG_1, RT5682_PWR_FV1,
RT5682_PWR_ANLG_1, RT5682_PWR_FV2,
SND_SOC_DAPM_SUPPLY("Vref1", RT5682_PWR_ANLG_1, RT5682_PWR_VREF1_BIT, 0,
SND_SOC_DAPM_SUPPLY("HP Amp L", RT5682_PWR_ANLG_1,
SND_SOC_DAPM_SUPPLY("HP Amp R", RT5682_PWR_ANLG_1,
regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0xa2af);
regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0xf2af);
regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0x002f);
case RT5682_PWR_ANLG_1:
snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
RT5682_PWR_ANLG_1, RT5682_PWR_FV2, 0);
RT5682_PWR_ANLG_1, RT5682_PWR_FV2, RT5682_PWR_FV2);
RT5682_PWR_ANLG_1, RT5682_PWR_MB, 0);
RT5682_PWR_ANLG_1, RT5682_PWR_VREF2, 0);